CompuLab Trim-Slice Manuel d'utilisateur Page 12

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Interfaces and Connectors
Revised July 2011 Trim-Slice 12
3.4.2 S/PDIF
The S/PDIF output is implemented with the Tegra2 S/PDIF interface. The S/PDIF output signal is
routed to audio jack P5.
3.5 USB Subsystem
3.5.1 USB Hub
The Trim-Slice features four external USB ports that are implemented with the SMSC USB2514 hub.
The USB hub is interfaced with the Tegra2 USB-3 port. USB hub down-stream ports are routed to the
USB connectors P6, P8, P9 and P11.
For additional details, please refer to the USB2514 datasheet, available from http://www.smsc.com/.
3.5.2 USB-1
The Tegra2 USB-1 port is routed to a USB selector that allows utilizing the port for two separate,
mutually exclusive functions:
On-board USB2-to-SATA controller that implements the Trim-Slice SATA storage interface.
For additional details, please refer to section 3.7 of this document.
USB device port. For additional details, please refer to section 5.10 of this document.
The USB selector path is controlled with the Tegra2 GPIO_PV2 signal.
3.5.3 USB-2
The Tegra2 USB-2 port is utilized for internal Trim-Slice mother-board functionality and is not
available for external use. The port is implemented with an on-board SMSC USB3320 phy. The USB
signals are routed to connector P38.
3.6 Gigabit Ethernet
The Trim-Slice Gigabit Ethernet interface is implemented with the RTL8111D Realtek Gigabit
Ethernet controller. The controller is connected to the PCIe-0 interface of the Tegra2 SoC. The
interface supports the following main features:
Full compliance with IEEE 802.3 standard
Crossover Detection and Auto-Correction
Auto-negotiation
Activity and speed indicator LED controls
Gigabit Ethernet signals are routed to the RJ-45 connector P7.
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